SPLD – Simple Programmable Logic Devices Integrated Circuit
An SPLD (Simple Programmable Logic Device) is the most basic member of the programmable logic family.
Think of a modern FPGA as a massive Lego theme park. In comparison, an SPLD is just a handful of basic bricks. It allows engineers to define internal logic connections via programming, replacing multiple discrete logic gate chips like the 74-series.
IC-Mart Your Trusted Source for SPLD – Simple Programmable Logic Devices Chips
(from leading manufacturers)
Typical SPLD Manufacturers and Models
| Manufacturer | Typical Series/Models | Category | Key Features |
| Microchip (Atmel) | ATF16V8C, ATF22V10C, ATF750C | Classic EECMOS | Industry standard. High compatibility. Ideal for replacing legacy PAL/GAL chips. |
| Renesas (Dialog) | SLG46827, SLG46533, SLG47115 | Mixed-Signal (GreenPAK) | Integrates analog components (ACMP/ADC). Ultra-low power. Tiny footprint. |
| Texas Instruments | TPLD1201, TPLD801 | Modern Logic (TPLD) | New PLDs launched in 2025-2026 for simple logic integration. |
| Lattice | GAL16V8, GAL20V8, GAL22V10 | Classic GAL Architecture | The pioneer of GAL. These are industry logic benchmarks, though many are legacy models. |
| Rochester Electronics | TIBPAL16L8, PAL20L8 | Legacy/Discontinued | Provides authorized recreations of discontinued chips for aerospace or maintenance. |
Chinese Manufacturers of SPLD/CPLD Equivalents
1. GOWIN Semiconductor
Gowin leads the Chinese programmable logic market. Their “LittleBee” series is the best modern alternative for SPLDs. It features instant-on capability and ultra-low power consumption.
- Series: GW1N, GW1NZ (Ultra-Low Power).
- Examples:
- GW1NZ-ZV: Tiny logic capacity. Perfect for address decoding and state machines.
- GW1N-1: Approx. 1K logic cells. It can replace several CPLD/SPLD chips at once.
2. Anlogic
Anlogic is a major player in the FPGA market. Their ELF series targets CPLD and small-scale logic applications with high cost-efficiency.
- Series: ELF (EF2/EF3).
- Examples: EF2L05 / EF2L10. Widely used in consumer electronics and industrial control.
3. Hercules Micro (HME)
Focuses on heterogeneous programmable technology. Their H-Series (Hercules) includes products designed for small-scale logic.
- Series: H-Series (Hercules), M-Series (Mountain).
- Example: H1C02. A low-density FPGA often used as a CPLD replacement.
4. Zhiduojing
Specializes in the mid-to-low-end FPGA/CPLD market. Their products are common in industrial control and video interface conversion.
- Series: Sealion (CPLD architecture).
- Example: SA2 Series. Fully compatible with traditional logic control needs.
5. Fudan Micro
A veteran in the Chinese IC industry. They offer a comprehensive line of CPLDs for high-reliability markets.
- Series: CPLD Series.
- Example: JFM7000 Series. Often used in specialized industrial applications.
Domestic Replacement Guide for Legacy SPLDs
| Original SPLD Model | Logic Capacity (Approx.) | Recommended Direction | Typical Replacement Chip |
| GAL16V8 / 20V8 | 250 – 500 Gates | Minimal CPLD / Small FPGA | Gowin GW1NZ-1 / GW1NZ-ZV |
| GAL22V10 | 500 – 750 Gates | Low Power CPLD | Anlogic EF2L Series |
| EPM240 / EPM570 | 192 – 440 Macrocells | Mainstream Chinese CPLD | Zhiduojing Sealion 2000 |
I. SPLD – Simple Programmable Logic Devices Core Definition and Principles
The core of an SPLD is the Product Term architecture. It consists of a programmable “AND” array and an “OR” array.
Engineers use programming tools to combine input signals according to Boolean logic equations. For example:
$$Y = (A \cdot B) + (C \cdot \overline{D})$$
Inside the SPLD, the “AND” array generates the product terms, and the “OR” array sums them up.
Four Common Architectures:
- PROM: Fixed AND array, Programmable OR array.
- PLA: Both AND and OR arrays are programmable (High flexibility, slower).
- PAL: Programmable AND array, Fixed OR array (Balanced speed and flexibility).
- GAL: An evolved PAL using EECMOS technology. It is reprogrammable and the most common classic SPLD.
II. Typical Application Scenarios
- Glue Logic: Interfacing two large chips (like a CPU and memory) where signals don’t match. It replaces multiple 74-series gates to save PCB space.
- Address Decoding: Selecting specific peripherals based on the CPU address bus. SPLDs offer fixed, ultra-short latency (nanoseconds).
- System Reset & Monitoring: Managing power-on sequences, reset signal distribution, or status LED monitoring.
- Mixed-Signal Control: Modern SPLDs (like GreenPAK) integrate comparators and ADCs. They handle power management in smartphones or wearables at micro-amp (\mu A) power levels.
III. SPLD Classifications
1. Classic Digital SPLD
Traditional devices based on GAL or PAL. They handle simple combinatorial and sequential logic. They now use EECMOS or Flash for multiple rewrites.
- Key Models: Microchip ATF16V8C, Lattice GAL22V10.
2. Mixed-Signal Programmable Matrix
The latest trend. It merges digital logic arrays (Macrocells) with analog circuits like comparators and timers in tiny packages.
- Key Models: Renesas GreenPAK, TI TPLD series.
3. Legacy Bipolar/High-Speed SPLD
Uses early Fuse-link technology. These have high power consumption but extremely short propagation delays. They are mostly for maintaining older systems.
- Key Models: TI TIBPAL16L8.
Evolution of Logic Devices
| Stage | Logic Difference | Hardware Evolution | Application Trend |
| Traditional (PAL/GAL) | Pure digital AND/OR arrays. Fixed macrocells. | Shifted from Fuse to EECMOS/Flash. Reprogrammable. | Remains steady in simple glue logic. |
| Integrated (CPLD Predecessor) | Increased scale. Interconnects multiple GAL structures. | More pins and higher logic density. | Evolved into modern CPLDs. |
| Mixed-Signal (Modern SPLD) | Digital logic linked with analog peripherals. | Ultra-small packages (QFN). Micro-amp standby power. | Replaces discrete analog parts to cut BOM costs. |